PCB layout and high-speed routing are no match for your skills, and a little real-time electronic design feedback from the tool. With OrCAD, you can produce a manufacturable board design faster. Effortless Shape Creation and Management.
The first time I heard someone talking about “tuning” their high-speed PCB design, the memory of my middle school band came to mind. Back in those days, “tuning” meant taking kids who lacked experience and who used tired old instruments and trying to turn it all into something that blended together.
As you would expect, our first attempts at being in tune were not very successful. After some work, though, we were able to stay in tune together, and we began to sound like a real band.A band tunes up so that each instrument is in sync with the rest of the instruments in the band. When everyone plays a concert B-flat, it should all sound like the same note.
On the other hand, when a band is out of tune it can actually hurt to listen to the sound of the different instruments fighting against each other.Like a band, a high speed printed board design also needs to be “tuned up.” There are high-speed nets that must have specific lengths “tuned” to each other to function as intended. Let’s take a look at what trace tuning is on a PCB and discuss some ideas on how to best accomplish it.What is Trace Tuning?PCB breadboard trace tuning is creating serpentine trace routing map patterns to achieve a specific overall length of the trace, as shown in the picture below. This trace length must be matched with the lengths of other traces so that all of their signals arrive at their destinations at the same time. Are important in data and clock routing to synchronize all of these signals together.When I first started tuning traces to match lengths, it was more of a guessing game than anything else. We only had a general length that we had to match, and there were even times that we would visually compare the traces on the screen to see if they were close. Now you can use trace length report generators and real-time trace length reporting, while you are routing, to find the exact trace length.
You can also use trace length rule constraints and automated tuning functions to help you.Some examples of serpentine routing on a PCBDifferent Types of Trace Tuning for Trace Length Matching in PCB DesignIn the picture above you can see examples of serpentine trace tuning. This tuning can be tight in an accordion pattern or elongated in a trombone pattern.
![Speed Speed](http://www.fortex.co.uk/wp-content/uploads/2015/08/DSC0522.jpg)
High-speed design experts recommend routing in to fill up the area and leave space for tuning later. Then when you are ready, come back and fine tune the trombone routing in a tighter accordion pattern to get the exact trace length that you need. You should also use 45-degree corners on the waves of the accordion patterns and space the waves at a minimum distance of 3 times the trace width.In the same way that individual nets need to be tuned to other nets, you should also match the lengths of the two nets in a differential pair. Keep the pair routed together as much as possible and put in the trace length waves on the. It is important to route the two traces of differential pair together around obstacles such as vias or holes when you are impedance matching their lengths. Don’t split the pair up while routing around these obstacles. Differential pairs will also need to be matched in length to other differential pairs as well.PCB trace routingTrace tuning functionality that will help youThere is a lot of in printed board design tools that will help you with your routing and trace tuning.
First, you can set up trace length rules in the high-speed routing constraints. These rules will ensure that your routing is created at the correct lengths and appropriately matched to other nets. You can also use processes that will automatically route the tuning patterns to the correct lengths so that you don’t have to manually create the waves. These utilities provide the control you need to regulate the trace width and the height and spacing of the accordion wave patterns.
Finally, you can also use differential pair routers to match the lengths of the two traces in the pair together., like, has functionality for routing and trace tuning built into it. This will help you to route the high speed traces on your printed board pcb to the correct lengths without having to guess their actual lengths. With this kind of help, you can create a high-speed compliant design in less time and with greater confidence in its accuracy.Would you like to find out more about how Altium can help you with your high-speed design needs?Check out Altium in action. Automated High-Speed Signals for High-Speed TopologiesAbout the AuthorPCB Design Tools for Electronics Design and DFM.
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I'm wanting to route 125Mz differential Signals ( ethernet ) between two pcbs that are 90 degrees opposed to each other. The options I can see (a) Create a Flex Rigid PCB that has ethernet signals that go across the flex to get to the other side.
( sounds like a chicken joke ). The issue i worry about here is that theres going to potentially be some pretty ugly impedance mismatching going on across the flex, where the underlying material changes.
(b) Use some kind of board to board connector, that will let me set up the 90 degree bend. Any body have any thoughts on this. Is this for a hobby or professional project? 125 MHz is not really high-speed so I would not worry too much about impedance mismatch and signal integrity issues. If you are in the multi-gigabit range then this becomes important. Make sure that you have a good ground plane under/next to the signals at all times.
If using a flex cable, make sure you have ground signals next to the differential signals such that the loop area (and inductance) is as low as possible. Large loop areas mean lots of inductance and signal integrity and EMI issues.
How about using a plain old PCI Express connector; the kind that is on a motherboard? That is intended to meet a plug-in card PCB at 90 degree angle. Those are also well designed with regards to SI/EMI and come in many different pin ranges. I have found that 2.5 Gigabit/second is quite forgiving, 5 Gbps starts to be tricky and at 10 Gbps you really have to know what you are doing! Normal (single row) header stock is typically very similar to ribbon cable, i.e., 100-130 ohms differential (for any given pair, surrounding pins grounded), or 50 ohms single ended (i.e., one line in use with the surrounding lines grounded). You can also get controlled impedance high-speed connectors (board-to-board and wire-to-board), but they're not worth it until you have long uncompensated LVDS signals, and gigabits.
(100BASE-T is pretty tolerant of noise, though it's not frequency-compensating I think.) Flex can be had in controlled impedance, but it's probably not worth it. Board to board headers work pretty well.
Best is always prevention, of course. Can you move the PHY up to the connector? Can you move the connector down to the PHY? Normal (single row) header stock is typically very similar to ribbon cable, i.e., 100-130 ohms differential (for any given pair, surrounding pins grounded), or 50 ohms single ended (i.e., one line in use with the surrounding lines grounded). You can also get controlled impedance high-speed connectors (board-to-board and wire-to-board), but they're not worth it until you have long uncompensated LVDS signals, and gigabits. (100BASE-T is pretty tolerant of noise, though it's not frequency-compensating I think.) Flex can be had in controlled impedance, but it's probably not worth it.
Board to board headers work pretty well. Best is always prevention, of course. Can you move the PHY up to the connector? Can you move the connector down to the PHY? If this has an external MII interface, remember that that should be impedance-controlled as well; but it only needs to be regular CMOS, and if it's point-to-point (from some controller or master device thing), a little resistor on each end will do (source termination). 50-100 ohm characteristic impedance, and matching resistors (don't forget to subtract the approximate Rds(on) of the CMOS output pins to get the required resistor value) should do the job, and with much more tolerance than the highspeed side.
If this has an external MII interface, remember that that should be impedance-controlled as well; but it only needs to be regular CMOS, and if it's point-to-point (from some controller or master device thing), a little resistor on each end will do (source termination). 50-100 ohm characteristic impedance, and matching resistors (don't forget to subtract the approximate Rds(on) of the CMOS output pins to get the required resistor value) should do the job, and with much more tolerance than the highspeed side. I'd be carefull with that.
In many cases there has to be a certain distance between the phy and the transformer! A minimum of 25mm (1') isn't uncommon. Also don't forget TVS diodes and a couple of small ferrite beads (say 10 to 30 Ohm at 100MHz but do check their characteristic!) in series for EMC between the phy and the transformer. Regarding the connector: almost anything goes so a 2.54mm/0.1' header will do just fine. Most of the energy of a 100Mbit ethernet signal is in the first 10MHz or so. I have a similar design where the Phy and transformer is 16mm ( as the track flys ) away. It works well.
The TVS diodes are critical! Learned that lesson the hardware a few years ago. Couldn't figure why my PHY's keep dying when i disconnected them from the PoE. I've been using Semtech R525S's for this purpose. Its actually on my list of things to research to replace, because the way it is packaged sometimes makes it hard to route the tracks without using vias. ( adding vias is a bad idea on these tracks ).
I think i'll be better off using single didoes or a package with two ( rather than package with four ). Obvisouly with a pin header, its likely that i'll end up with a connector that effectively has a right angle bend in it. That is something that we go to some lengths to avoid on these traces, but this might be unavoidable. I feel so much better now. Another day of learning. Actually its really good, this thread has already been really helpful. As for the certain distance thing.
I've just got back and read the manufacturers notes for the Phy i'm using and it says, in the layout guide. It says 'Place the RJ45 connector, the magnetics and the LAN9303 QFN as close together as possible.' How would you recommend measuring the the signal level and rise/edge speeds? I was not sure about ntnicos comment about putting the ferrite beads in series, none of the reference designs i've looked at have those.
The previous design was tested with 100m of Cat5 cable, and it 'seemed' to work ok. So, maybe i just got lucky. The only thing this does is to remove the high-frequency content of the signal. This will lower EMI but also remove the quick edges of the signal! The correct way to lower EMI is to make sure that the loop inductance between the signal and return path is as small as possible. If using a differential signal then there will not be much EMI to worry about. This is because the return current will go in the opposite wire rather than in the ground plane.
If your individual traces within the differential pair is not matched then you'll end up with EMI (due to a common-mode signal that will return via the ground plane) so make sure to length-match properly. Quote The correct way to lower EMI is to make sure that the loop inductance between the signal and return path is as small as possible. If using a differential signal then there will not be much EMI to worry about.
This is because the return current will go in the opposite wire rather than in the ground plane. If your individual traces within the differential pair is not matched then you'll end up with EMI (due to a common-mode signal that will return via the ground plane) so make sure to length-match properly. I feel so much better now. Another day of learning. Actually its really good, this thread has already been really helpful. As for the certain distance thing.
I've just got back and read the manufacturers notes for the Phy i'm using and it says, in the layout guide. It says 'Place the RJ45 connector, the magnetics and the LAN9303 QFN as close together as possible.' How would you recommend measuring the the signal level and rise/edge speeds? I was not sure about ntnicos comment about putting the ferrite beads in series, none of the reference designs i've looked at have those. For some chips (IIRC SMSC) you have application notes for improving EMC performance. That is where you will find the series ferrite beads hint.
EMC performance is not just affected by closely matching the impedance. At some point the ground plane is gone and you are left with a bunch of twisted pair wires. If the ethernet phy pumps out a lot of common mode HF originating from the modulation of the ethernet signals then the wires will be happy to act as an antenna. And if you look at the rear of an ethernet outlet you'll see the wires will be untwisted for quite a long distance.
One of my customers uses a spring loaded terminal for connecting 100Mbit ethernet because it is more reliable than expecting electrical engineers to crimp an RJ45 properly onsite. That has been tested with maximum cable lengths, cheap switches, etc and it always works.
I didn't expect that but if you look at transmission line theory you'll see that a small impedance discontinuity doesn't cause problems. For example: a lot of multi GHz RF chips don't allow to attach a microstrip of the proper width so there will be a discontinuity where the signal enters or exits the chip package but that isn't a problem. In my experience it is necessary to look closely at the application manual of the ethernet phy you are using but be aware not everything is in there and it may be necessary to add components which degrade it's signalling performance in order to pass EMC testing. Yeah, 100Mb isn't terrifically fast, so a short discontinuity doesn't count for much. You don't have to worry much about characteristic impedance if the PHY, transformer and connector are nearby.
A ferrite bead is much very different than a few inches untwisted, though. For that to work, it would at least have to be a high frequency, low impedance type, not an average wideband 100 ohm (or whatever) type; in which case it wouldn't do much for EMC anyway. I wouldn't suggest playing with EMC on the PHY side, because it's supposed to be individual 50 ohm traces, not differential, at that point. (Except where the termination resistors join, which is 25 ohms Thevenin equivalent. Those should be right by the PHY to minimize stub lengths.) The magnetics handle EMC by using balanced matching transformers and common mode chokes. Additional ones could be added if there's imbalance at high frequencies (i.e., poor common mode rejection). You can get connectors with this built in, saving board area.
They're actually fairly ugly inside (untwisted lengths, anyone?), but as long as it meets spec.